1. Field of the Invention
The invention relates to an output buffer and, more particularly, a programmable output buffer with variable driving strengths and variable slew rate.
2. Description of the Related Art
Output buffers in CMOS integrated circuits are used to couple data and control signals to external pins that need to drive different types of load, typically capacitive in nature, hence the output transition timing are dependent on the capacitance value of the load and the driving strength of output buffer. For driving a large capacitive load, the output buffer needs to have larger output drive strength that allows larger current to be sinked and sourced by the load for smaller output transition times. A smaller drive strength would increase the output transition times. On the other hand for a small capacitive load, the output buffer requires only a small output drive strength, and a higher drive strength buffer driving a small load would generate large transient currents resulting in large undesired ground and power bounce in the supply rails and ringing in the system. Also, it dissipates extra power that must be avoided as integrated circuits become smaller and faster. Therefore, an output buffer with programmable driving strength is required such that a desirable output drive strength can be selected depending on the load attached to the output pin. Further, a slew rate limit option is implemented in an output buffer that allows it to operate in slow systems with low noise and ringing.
FIG. 1 shows an embodiment in accordance with the U.S. Pat. No. 5,926,651. In this circuit, predrivers made of transistors K34, K35, K36, K37 and K38 control the pull-up drive strength. Switching on transistor K31 gives one value of drive strength (say KX), switching on transistor K32 gives another drive strength (say KY) while switching on both transistors K31 and K32 sets the output buffer with a different drive strength (KX+KY). Thus, the user can select one of the three different driving strengths. Also, the circuit provides variable slew rate for each driving strength by controlling the speed of the switching of driver transistors K31 and K32. For each of the driving strength, two slew rate variations are available.
In all such circuits, the maximum noise is generated for higher driving strengths in a fast slew rate option since larger currents are sinked and sourced. As driving strength is reduced, the output delays degrade and the noise reduces since now smaller currents are sourced and sinked. Whereas in case of a slow slew rate the output delays further deteriorate.
This implies that the output delays and supply noise vary widely for various drive strengths and slew variations, and that for lower driving strengths the delays are worse while noise is much lower than the maximum noise that the system can tolerate.